LFSR (Linear Feedback Shift Register) is commonly employed in various cryptography applications to generate pseudo-random numbers. The overall number of random state produced by the LFSR is determined by the feedback polynomial. LFSR is a shift register in which some of their outputs are taken in exclusive-OR format that forms the feedback path. So it capable to generate maximum of 2n-1 random sequence by using maximum feedback polynomial. In this paper we implement 8, 16 and 32 bit LFSR for PN sequence generation using VHDL to study its performance and analyse the behaviour of its randomness.