Abstract

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IMPLEMENTATION OF NEURAL NETWORK FOR SIGNAL COMPRESSION AND DECOMPRESSION USING 45 NM CMOS TCHNOLOGY

Prof. Pashanki B.Malwankar, Pritesh R.Gumble


The advancement in medical science we are trying to process the information artificially since our biological system performs inside our body. Artificial intelligence through a biological word is realized based on mathematical equations and artificial neurons. Our main focus is on the implementation of Neural Network Architecture (NNA) with on chip learning in analog VLSI for generic signal processing applications. In the proposed paper analog components like Gilbert Cell Multiplier (GCM), Neuron activation Function (NAF) are used to implement artificial NNA. The analog components used are comprises of multipliers and adders’ along with the tan-sigmoid function circuit using MOS transistor in sub threshold region. This neural architecture is trained using Back propagation (BP) algorithm in analog domain with new techniques of weight storage. Layout design and verification of the proposed design is carried out using micriwind3.1 software tool. The technology used in designing the layout is 45nm CMOS technology